ABI notes
AAPCS64 defines argument registers, callee-saved registers, stack alignment, vector registers, and platform calling rules. Apple arm64 adds platform-specific conventions.
ARMv8-A / ARMv9-A ecosystem
A load/store 64-bit architecture used in phones, Apple Silicon, servers, embedded boards, secure firmware, kernels, and modern performance-sensitive software.
AAPCS64 defines argument registers, callee-saved registers, stack alignment, vector registers, and platform calling rules. Apple arm64 adds platform-specific conventions.
Exception levels EL0-EL3, vector tables, system registers, MMU, barriers, traps, SMC/HVC, pointer authentication on supported platforms.
| Name | Aliases | Class | Role |
|---|---|---|---|
| X0-X7 | W0-W7 | General | Arguments and return values |
| X8 | W8 | General | Indirect result and syscall number on Linux |
| X9-X15 | W9-W15 | General | Caller-saved temporaries |
| X19-X28 | W19-W28 | General | Callee-saved registers |
| X29 | FP | Stack | Frame pointer |
| X30 | LR | Control | Link register return address |
| SP | WSP | Stack | Stack pointer |
| V0-V31 | B/H/S/D/Q views | SIMD/FP | Floating point and vector work |
Load/store
LDR, STR, LDP, STP, addressing modes, literals
Arithmetic and logic
ADD, SUB, AND, ORR, EOR, shifts, bitfield ops
Branching
B, BL, RET, CBZ, CBNZ, TBZ, TBNZ, conditional branches
System
MRS, MSR, SVC, HVC, SMC, ISB, DSB, DMB
Atomics/SIMD
LDXR/STXR, acquire/release, NEON, SVE where available
.global _start
_start:
mov x8, #64
mov x0, #1
adr x1, msg
mov x2, #12
svc #0
mov x8, #93
mov x0, #0
svc #0
msg:
.ascii "hello arm64\n"